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Re: Quadras vs. MCL2.0

MCL 2.0b1 will definitely not run on a 68040 whose instruction cache is enabled
and whose data cache is in "copyback" (vice "writethrough") mode.  I can't
think of any reason why it wouldn't work with the instruction cache disabled
and the data cache in writethrough mode, but haven't been able to verify that
it does indeed work in that configuration.

The final version of 2.0 will run on 68040s with both caches enabled; 
unfortunately, the changes required to make 2.0b1 do so are too pervasive to
make a simple patch practical.  (Among other things, incremental compilation 
needs to be made aware of the issues raised by the copyback data cache: code
written to "memory" isn't necessarily there ...)