[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

more ?s about the XL3600 ...

    Date: Fri, 11 Jan 1991 08:00 EST
    From: p2@porter.asl.dialnet.symbolics.com (Peter Paine)

	Date: Thu, 10 Jan 91 12:00:25 MST
	From: drstrip@cs.sandia.gov (David R Strip )

	     Date: Thu, 10 Jan 91 13:36 EST
	     From: Barry Margolin <intvax!barmar@Think.COM>
		 Date: Thu, 10 Jan 91 10:22:17 MST
		 From: drstrip@cs.sandia.gov (David R Strip )
		 In his description of the xl3600, peter paine writes:
		      The FPA option is a 125 Transputer hypercube coprocessor which can also
		      be used to run concurrent Lisp through shared memory.
		 I'm baffled ;-)
		 Why does a machine of this class have an FPA option. I would think it should be standard
		 equipment.                                   ^^^^^^

    Some suggest that this may have been a marketing decision. The early
    instant powdered cake mix products failed as most mothers felt that
    their children were special and therefore a extra egg in the mix would
    make it just right. Ruin. So later products had one dried egg removed
    and instructions to add an egg. Success - happy mothers and fat
This may be a good opportunity for me to perform a bit of market
research.  One of the first applications we plan to market along with
the XL3600 is a speaker-independent speech recognition system that is
able to detect use of the word "UN*X" in continuous speech.  Upon
detection, a high frequency signal is sent out that is precisely tuned
to the speaker's alpha waves, creating a reverse-feedback loop that
blows out the speaker's cerebral cortex and renders him/her incapable of
further speech.  The question I have for you all is: should we sell this
application as a layered product, or should we bundle it? 

	     It's already pretty fast without it.  You'd have to be pretty desperate
	     to need to accelerate it even more.

    Policy is to allow the gratuitous production of the most inefficient and
    worthless code, but at no time should the customer feel that it is
    processor performance which is holding back success.

	Really? The posted spec said that the box contained 3 Ivory Mk.4 chips. The Ivories that
	I have been familiar with used external FPAs (Weitek, I think). When was the FPA integrated
	into the Ivory chip? Or is there a standard FPA in the xl3600 distinct from the 
	optional Transputer one?
		 I'm even more baffled by how you configure 125 nodes as a hypercube.
	     Sounds like a four-dimensional hyper-pentagonal-prism, with five nodes
	     along each edge.

    Exactly, the spec that I have is a bit short of bobbledy-speak. This
    configuration is of especial value when driving the generalized pattern
    matcher, and facility which finds patterns in user data sets that are
    NOT already described in the RSKB (Roget Scientific Knowledge Base).
	If that is true, then you only have a three-dimensional thing, which seems to limit
	the amount of routing versatility. Seems like a strange choice of geometry, though
	I haven't been following the area that closely. BTW, do you know what programming 
	options there are for the hyper-thing, or is it done transparently in the compiler?


    The FPA is setup by default to assist in the double precision vector
    processing required to drive the 3D HDTV displays. When using the
    Transputer resource as a hypercube, only 64 concurrent nodes are
    guaranteed operational - the spare 61 are automatically bypassed as they
    fail (the Transputer having lower a MTB rating than Ivory silicon).